The European Patent Office considered several method steps for generating a parallel computation graph as not technical. Here are the practical takeaways from the decision T 1125/17 (Parallelizing computation graphs/AB INITIO) of April 2, 2019 of Technical Board of Appeal 3.5.06:
Key takeaways
The mere potential for a speed-up by parallelization of a computer program is not sufficient for arguing a “further” technical effect as a requirement for patentability of a computer program.
The invention
This patent application relates to computation graphs in which the vertices and the links define, respectively, “data processing elements” and the data flow between them. More specifically, the application relates to the transformation of “serial computation graphs” into “parallel computation graphs”. The application explains that it may be desirable to implement a computation graph using multiple instances of individual components. For example, each instance of a component may be hosted an a different processor, thereby achieving a coarse-grain parallelism that provides an overall increase in computation capacity.
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Claim 1 (auxiliary request 5)
Is it patentable?
According to the applicant, it would be easier to parallelize a parallel computation graph as generated by the claimed method:
6. During the oral proceedings, in the context of auxiliary request 4, it was discussed whether the transformation of one computation graph into another, without an explicit mention of the deployment of parallel hardware or the execution on parallel hardware, would have to be accepted as a technical effect on the assumption that the generated computation graph was established as lending itself more easily to parallelization than the given one. Although this question turned out not to be decisive for the case at hand, the appellant encouraged the board to comment on this question in its decision.
In response, the Board in charge explained that it is of the opinion that the generated parallel computation graph is actually not easier to parallelize than a given user-specified graph. Moreover, the Board argued that an accelerated execution of a parallel program would not only dependent on the program itself, but also on the computer platform on which it is executed. In other words, when a program is executed on a single-core architecture, no speed-up may occur, whereas an acceleration may be achieved when the same program is executed on a multi-core platform:
6.3 Even a program written in a programming language with parallelization instructions or with some express potential for parallel execution such as array processing may be executed on parallel hardware or not. Such a program can also be executed on a single-core processor. In this case, a speed-up by parallelization is not achieved. In many cases, a parallel program could be expected to execute more slowly on the single core than an equivalent serial program since any parallelization overhead is not compensated by the speed-up of parallel computation. This is to say that the speed-up of parallelization is not achieved by the form of the parallel program alone and not before the program is actually deployed and executed on parallel hardware.
Since the effect of an accelerated execution is only achieved on a specific execution platform, the effect of a speed-up could not be attributed to the program alone. Hence, to argue the technical effect of an accelerated execution, the execution platform would have to be included in the claim, which is not the case here:
6.5 This board takes the view that T 1173/97 meant to make this statement only if the mentioned further technical effect was produced whenever the program was run, i.e. on any suitable hardware or runtime environment. For if that effect was produced on a particular execution platform but not on another, the effect could not be attributed to the program itself – unless maybe there was an argument to the effect that the required execution platform was implicit in the program claim. In all other situations, it would seem that the execution platform required to achieve the effect would have to be claimed as an essential feature.
6.6 This would appear to mean that if, as in the present case, an inventive-step argument is to rely upon a speed-up by parallelization, a parallel execution platform must be claimed. Consequently, the mere potential for a speed-up by parallelization would not seem to be sufficient as a “further” technical effect because this effect is not achieved irrespective of how the program is executed.
As a result, the Board dismissed the appeal.
More information
You can read the whole decision here: T 1125/17 (Parallelizing computation graphs/AB INITIO) of April 2, 2019.